Manufacturers are driven to make semiconductor devices as small as possible, both in terms of area (length and width) and height. While the area of a device is most limited by the size of a semiconductor die included in the device, the height of the device is usually limited by a package body which encapsulates the die. Conventional plastic and ceramic packages account for a majority of the overall size of a semiconductor device. Several packaging technologies have emerged to help reduce the size of a package, one such technology being TAB (tape automated bonding). TAB devices employ a flexible polymer support member which is similar to film used in 35 millimeter cameras. Thin copper foil is laminated to, or formed upon, the polymer film. The film is patterned by etching away selected portions of the copper to form a plurality of copper leads. The leads are often coated with a conductive film, for instance tin or gold. The conductive leads are electrically coupled to an active surface of a semiconductor die usually by thermal compression or liquid phase bonding. An encapsulant is deposited onto the surface of the die to provide mechanical protection and to prevent environmental contamination, while at the same time helping to secure each of the leads in place. In many TAB devices, the encapsulant acts as a protective member much like conventional plastic and ceramic package bodies. However, the encapsulant is typically very thin, often less than 250 .mu.m or one-quarter of a millimeter, thus achieving a very thin package profile.
Although TAB devices have provided a significant advantage by reducing the size of semiconductor devices, TAB has also brought about several disadvantages which respect to manufacturability. A considerable problem is that the encapsulant overlying the die surface creates stress in the die because the coefficient of thermal expansion (CTE) is typically much higher for the encapsulant than for the semiconductor die. For example, the CTE of silicon which is commonly used as a die material is on the order of 2.7-3 ppm (parts per million)/.degree. C. while the CTEs of commonly used encapsulants are on the order of 15-200 ppm/.degree. C. Stresses in the die are primarily the result of curing the encapsulant. After being deposited, the encapsulant is cured to remove unwanted solvents and to cross-link or rigidify the material. Upon being brought to room temperature following the cure, the encapsulant contracts much more than the semiconductor die due to the differing CTEs. Thus, the encapsulant creates compressive stresses in the die which, if severe enough, can cause the die to warp or crack. The stress problem becomes worse as the size of the die or thickness of the encapsulant increases. The composition of encapsulants (for instance filler materials, filler volume percent, and polymer type) has been varied to help minimize the CTE mismatch between the encapsulant and the die. However, materials with CTEs closer to the CTE of silicon, in other words with lower CTEs, often have poorer thermal performance. Thermal performance refers to the ability to conduct heat and is an important property in encapsulant materials used in high power devices. In addition, low CTE encapsulants may have higher dielectric constants resulting in an undesirable increase in die capacitance.
Flow control of the encapsulant material is another problem in the manufacturing of TAB devices. Typically, the encapsulant is dispensed onto an active surface of a semiconductor die in a pattern of closely spaced dots or lines or in a puddle in the center of the active surface. It is desirable for the encapsulant to flow evenly across the entire active surface and establish a substantially continuous film. Not only is this film used to protect the die from mechanical damage, but also from environmental contamination such as water ingression. Therefore, it is critical that the encapsulant cover as much of the active surface as possible. To assure that the active surface will be covered sufficiently, some semiconductor manufacturers over-compensate by partially flowing the encapsulant over edges of the die. However, in doing so, it is difficult to control the amount of "overflow" in such a way as to prevent the encapsulant from flowing onto the backside of the die. Additional flow control problems arise upon curing an encapsulated device. Heat associated with the cure process initially softens the encapsulant (before cross-linking progresses to a rigid state), allowing the material to flow more freely. However, it is difficult to predict how a deposited encapsulant will flow upon exposure to elevated temperatures such as those used in curing.
Flow properties of common encapsulant materials also make it difficult to achieve a uniform thickness of material across a die surface. For example, the thickness of the encapsulant near edges of the die is often much less than the thickness in the center of the die. The portions of the die near the edge will therefore have less protection. Uneven encapsulant thickness also creates problems relating to appearance and the ability to mark or print on the device. Semiconductor devices are generally marked, for instance by pad printing, with the manufacturer's name and an identification number. Uneven surfaces degrade the quality of the marking.
Therefore a need exists for an improved semiconductor device, and more specifically for an improved semiconductor device which has reduced stress on a semiconductor die and which provides better flow control of an encapsulant material and a process for making the same.